Invention Grant
US09478579B2 Stacked chip image sensor with light-sensitive circuit elements on the bottom chip 有权
堆芯芯片图像传感器与底部芯片上的感光电路元件

Stacked chip image sensor with light-sensitive circuit elements on the bottom chip
Abstract:
An example imaging sensor system includes a backside-illuminated CMOS imaging array formed in a first semiconductor layer of a first wafer. The CMOS imaging array includes an N number of pixels, where each pixel includes a photodiode region. The first wafer is bonded to a second wafer at a bonding interface between a first metal stack of the first wafer and a second metal stack of the second wafer. A storage device is disposed in a second semiconductor layer of the second wafer. The storage device includes at least N number of storage cells, where each of the N number of storage cells are configured to store a signal representative of image charge accumulated by a respective photodiode region. Each storage cell includes a circuit element that is sensitive to light-induced leakage.
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