Multi-element wide-field lens for wafer-assembled chip-cube cameras

    公开(公告)号:US12287464B2

    公开(公告)日:2025-04-29

    申请号:US18086522

    申请日:2022-12-21

    Abstract: A chip-level camera includes an image sensor; a concave L1 lens element on an inside surface of a first substrate; a convex L2 lens element on a first surface of a second substrate; a diaphragm stop on a second surface of the second substrate or on a first surface of a third substrate, the diaphragm stop between the second and third substrates; a convex L3 lens element on a second surface of the third substrate spaced from the image sensor; a first spacer holding first substrate at a predetermined distance from the second substrate; and a second spacer holding the second substrate a predetermined distance from the image sensor. In embodiments, lens element L1 has concave aspheric radius of R1, and lens L2 convex aspheric radius of R2, such that 1.3

    Dual depth junction structures and process methods

    公开(公告)号:US12284839B2

    公开(公告)日:2025-04-22

    申请号:US17700858

    申请日:2022-03-22

    Inventor: Hui Zang Gang Chen

    Abstract: Transistors, electronic devices, and methods are provided. Transistors include a gate trench formed in a semiconductor substrate and extending to a gate trench depth, and a source and a drain formed as doped regions in the semiconductor substrate and having a first conductive type. The source and the drain are formed along a channel length direction of the transistor at a first end and a second end of the gate trench, respectively, and the source and the drain each includes a first doped region and a second doped region extending away from the first doped region. The second doped region extends to a depth in the semiconductor substrate deeper than the first doped region relative to a surface of the semiconductor substrate.

    PhotoVoltaic Image Sensor To Supress Black Solar

    公开(公告)号:US20250106533A1

    公开(公告)日:2025-03-27

    申请号:US18471466

    申请日:2023-09-21

    Abstract: A pixel of an image sensor includes a photodiode, a reset transistor, a peak hold transistor, and a first capacitor and a second capacitor. The pixels include, a first mode in which the noise and image output voltages of the photodiode are held in the first and second capacitors, respectively, and a second mode in which the output voltage of the photodiode in a state where the reset transistor is turned on to reset the photodiode is held in the first capacitor or the second capacitor. In the first mode, an image signal corresponding to the light incident amount of the photodiode and a noise signal when the light incident amount is relatively low are obtained. In the second mode, a noise signal when the light incident amount of the photodiode is relatively high is obtained.

    Pixel cell having anti-blooming structure and image sensor

    公开(公告)号:US12262563B2

    公开(公告)日:2025-03-25

    申请号:US17701632

    申请日:2022-03-22

    Abstract: A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively couple the photodiode to the floating diffusion region controlling charge transfer between the photodiode and the floating diffusion region. The transfer gate includes a planar gate disposed on the front surface of the semiconductor substrate and a pair of vertical gate electrodes. Each vertical gate electrode extending a gate depth from the planar gate into the semiconductor substrate. The first junction depth is greater than the gate depth.

    Dual gain column structure for column power area efficiency

    公开(公告)号:US12249999B2

    公开(公告)日:2025-03-11

    申请号:US18171211

    申请日:2023-02-17

    Abstract: A pixel cell readout circuit comprises a ramp generator having a ramp generator output. A first gain network is coupled to the ramp generator output and configured to provide a first variable comparator gain. A second gain network is coupled to the ramp generator output and configured to provide a second variable comparator gain. A first comparator has a first input coupled to the first gain network. The first comparator further has a second input selectively coupled to a first bitline and selectively coupled to a second bitline. A second comparator has a first input coupled to the second gain network. The second comparator further has a second input selectively coupled to the first bitline and selectively coupled to the second bitline.

    IMAGE SENSOR WITH OPTICAL STRUCTURE FOR FLARE REDUCTION

    公开(公告)号:US20250081656A1

    公开(公告)日:2025-03-06

    申请号:US18461320

    申请日:2023-09-05

    Abstract: An image sensor is described. The image sensor comprises a plurality of pixels arranged to form an active pixel array, a plurality of contact pads disposed within a peripheral region of the image sensor that surrounds the active pixel array, and an optical structure disposed within the peripheral region between the plurality of contact pads and the active pixel array. The optical structure is adapted to mitigate stray light from reaching the active pixel array.

    Camera Having Video Stream Indicator

    公开(公告)号:US20250030941A1

    公开(公告)日:2025-01-23

    申请号:US18356316

    申请日:2023-07-21

    Abstract: An image sensor comprises: a control block generating a video interface enabled signal, a video interface for receiving the video interface enabled signal, a pixel array for providing a video stream to the video interface, an output port for receiving the video stream from the video interface and outputting the video stream to outside of the image sensor, a stream indicator pin for receiving the video interface enabled signal from the control block when the video interface is receiving the video interface enabled signal from the control block, where a terminal of the video interface receiving the video interface enabled signal is connected to the stream indicator pin by a conductor, and they are sealed in a package of the image sensor.

    COLOR ROUTER BASED PHOTODIODES AND INTEGRATED PIXEL CIRCUIT

    公开(公告)号:US20250015101A1

    公开(公告)日:2025-01-09

    申请号:US18347017

    申请日:2023-07-05

    Abstract: Color router based photodiodes and integrated pixel circuit. In one embodiment, a plurality of pixels arranged in rows and columns of a pixel array are disposed in a semiconductor material. In some embodiments, each pixel comprises a plurality of photodiodes and a color router covering the plurality of photodiodes. In some embodiments, the plurality of pixels is configured to receive an incoming light through the color router. In some embodiments, the integrated pixel circuit includes a plurality of pixel circuits, where each pixel circuit is associated with a corresponding pixel of the plurality of pixels. In some embodiments, the pixel circuits are configured on a same horizontal plane as the plurality of photodiodes.

    IMAGE SENSOR WITH SHARED GATE ARCHITECTURE FOR METAL LAYER REDUCTION

    公开(公告)号:US20240405039A1

    公开(公告)日:2024-12-05

    申请号:US18204261

    申请日:2023-05-31

    Abstract: An image sensor comprising a semiconductor substrate, a first source region, a second source region, and a shared gate electrode is described. The semiconductor substrate includes a first side and a second side opposite the first side. The first source region and the second source region are each disposed within the semiconductor substrate proximate to the first side. The first source region is separated from the second source region by an isolation structure disposed within the semiconductor substrate between the first source region and the second source region. The shared gate electrode is disposed proximate to the first side of the semiconductor substrate and coupled to the first source region and the second source region to respectively form a first transistor and a second transistor.

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