Invention Grant
US09478643B2 Memory structure with self-aligned floating and control gates and associated methods
有权
具有自对准浮动和控制门和相关方法的存储器结构
- Patent Title: Memory structure with self-aligned floating and control gates and associated methods
- Patent Title (中): 具有自对准浮动和控制门和相关方法的存储器结构
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Application No.: US14140215Application Date: 2013-12-24
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Publication No.: US09478643B2Publication Date: 2016-10-25
- Inventor: John Hopkins , Fatma A. Simsek-Ege
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Thorpe North & Western, LLP
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/66 ; H01L29/423 ; H01L21/28 ; H01L27/115

Abstract:
A memory structure having at least substantially aligned floating and control gates. Such a memory structure can include a control gate material disposed between a first insulator layer and a second insulator layer, a floating gate material disposed between the first insulator layer and the second insulator layer and at least substantially aligned with the control gate material, the floating gate material including a metal region, and an interpoly dielectric (IPD) layer disposed between the control gate material and the floating gate material such that the IPD layer electrically isolates the control gate material from the floating gate material.
Public/Granted literature
- US20150179790A1 MEMORY STRUCUTRE WITH SELF-ALIGNED FLOATING AND CONTROL GATES AND ASSOCIATED METHODS Public/Granted day:2015-06-25
Information query
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