A selection circuit that selects a memory cell from a memory cell array and a read circuit for reading a resistance state of a resistance change element in the selected memory cell are provided. In memory cells of odd-numbered-layer and even-numbered-layer memory cell arrays that constitute a multilayer memory cell array, each memory cell in any of the layers has a selection element, a first electrode, a first resistance change layer, a second resistance change layer, and a second electrode that are disposed in the same order. Whether the selected memory cell is located in any layer of the multilayer memory cell array, the read circuit applies a voltage to the selected memory cell to perform the reading operation. The voltage applied to the selected memory cell causes the second electrode to become positive with reference to the first electrode in the selected memory cell.