Invention Grant
- Patent Title: Absorbing termination in an interconnect
- Patent Title (中): 互连中的吸收端接
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Application No.: US14464279Application Date: 2014-08-20
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Publication No.: US09485854B2Publication Date: 2016-11-01
- Inventor: Shaowu Huang , Kai Xiao , Beom-Taek Lee , Boping Wu , Xiaoning Ye
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H01P3/08 ; H01P11/00 ; H05K1/09 ; H05K3/30 ; H05K1/18 ; G06F1/16 ; H01P1/26 ; H01P5/16 ; H04L25/03

Abstract:
Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect disposed in a printed circuit board (PCB) assembly. In one instance, a PCB assembly may comprise a substrate, and an interconnect formed in the substrate to route an electrical signal within the PCB. The interconnect may be coupled with a connecting component that is disposed on a surface of the PCB. An absorbing material may be disposed on the PCB to be in direct contact with at least a portion of the connecting component to at least partially absorb a portion of the electrical signal. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20160057851A1 ABSORBING TERMINATION IN AN INTERCONNECT Public/Granted day:2016-02-25
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