A method for manufacturing a semiconductor device having metal gate includes following steps. A substrate is provided. At least a transistor including a dummy gate is formed on the substrate and the transistor is embedded in an interlayer dielectric (ILD) layer. A first removal process is performed to remove a portion of the dummy gate to form a first recess in the transistor. An etching process is subsequently performed to remove a portion of the ILD layer to widen the first recess and to form a widened first recess. A second removal process is subsequently performed to remove the dummy gate entirely and to form a second recess in the transistor. A metal gate is formed in the second recess and followed by forming an insulating cap layer on the metal gate.