发明授权
- 专利标题: Methods for flip chip stacking
- 专利标题(中): 倒装芯片堆叠方法
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申请号: US13548029申请日: 2012-07-12
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公开(公告)号: US09508563B2公开(公告)日: 2016-11-29
- 发明人: Woon-Seong Kwon , Suresh Ramalingam
- 申请人: Woon-Seong Kwon , Suresh Ramalingam
- 申请人地址: US CA San Jose
- 专利权人: XILINX, INC.
- 当前专利权人: XILINX, INC.
- 当前专利权人地址: US CA San Jose
- 代理商 Gerald Chan; LeRoy D. Maunu
- 主分类号: H01L21/48
- IPC分类号: H01L21/48 ; H01L23/14 ; H01L23/498 ; H01L23/00 ; H01L25/065
摘要:
A method for flip chip stacking includes forming a cavity wafer comprising a plurality of cavities and a pair of corner guides, placing a through-silicon-via (TSV) interposer with solder bumps coupled to a surface of the TSV interposer on the cavity wafer, such that the solder bumps are situated in the plurality of cavities and the TSV interposer is situated between the pair of corner guides, placing an integrated circuit (IC) die on another surface of the TSV interposer, such that the IC die, the TSV interposer, and the solder bumps form a stacked interposer unit, removing the stacked interposer unit from the cavity wafer, and bonding the solder bumps of the stacked interposer unit to an organic substrate such that the stacked interposer unit and the organic substrate form a flip chip.
公开/授权文献
- US20140017852A1 METHODS FOR FLIP CHIP STACKING 公开/授权日:2014-01-16
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