Invention Grant
US09524164B2 Specialized memory disambiguation mechanisms for different memory read access types 有权
针对不同内存读取访问类型的专门的内存消歧机制

Specialized memory disambiguation mechanisms for different memory read access types
Abstract:
A system and method for efficient predicting and processing of memory access dependencies. A computing system includes control logic that marks a detected load instruction as a first type responsive to predicting the load instruction has high locality and is a candidate for store-to-load (STL) data forwarding. The control logic marks the detected load instruction as a second type responsive to predicting the load instruction has low locality and is not a candidate for STL data forwarding. The control logic processes a load instruction marked as the first type as if the load instruction is dependent on an older store operation. The control logic processes a load instruction marked as the second type as if the load instruction is independent on any older store operation.
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