Invention Grant
US09543515B2 Electrode materials and interface layers to minimize chalcogenide interface resistance
有权
电极材料和界面层,以最小化硫族化物界面电阻
- Patent Title: Electrode materials and interface layers to minimize chalcogenide interface resistance
- Patent Title (中): 电极材料和界面层,以最小化硫族化物界面电阻
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Application No.: US14073927Application Date: 2013-11-07
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Publication No.: US09543515B2Publication Date: 2017-01-10
- Inventor: F. Daniel Gealy , Andrea Gotti , Davide Colombo , Kuo-Wei Chang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alpine Technology Law Group LLC
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L45/00 ; H01L27/24

Abstract:
A phase-change memory cell having a reduced electrode-chalcogenide interface resistance and a method for making the phase-change memory cell are disclosed: An interface layer is formed between an electrode layer and a chalcogenide layer that and provides a reduced resistance between the chalcogenide-based phase-change memory layer and the electrode layer. Exemplary embodiments provide that the interface layer comprises a tungsten carbide, a molybdenum carbide, a tungsten boride, or a molybdenum boride, or a combination thereof. In one exemplary embodiment, the interface layer comprises a thickness of between about 1 nm and about 10 nm.
Public/Granted literature
- US20150123066A1 ELECTRODE MATERIALS AND INTERFACE LAYERS TO MINIMIZE CHALCOGENIDE INTERFACE RESISTANCE Public/Granted day:2015-05-07
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