Invention Grant
- Patent Title: Method of integration of a magnetoresistive structure
- Patent Title (中): 磁阻结构的集成方法
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Application No.: US14704915Application Date: 2015-05-05
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Publication No.: US09553260B2Publication Date: 2017-01-24
- Inventor: Kerry Joseph Nagel , Kenneth Smith , Moazzem Hossain , Sanjeev Aggarwal
- Applicant: Everspin Technologies, Inc.
- Applicant Address: US AZ Chandler
- Assignee: Everspin Technologies, Inc.
- Current Assignee: Everspin Technologies, Inc.
- Current Assignee Address: US AZ Chandler
- Main IPC: H01L43/02
- IPC: H01L43/02 ; H01L43/08 ; H01L43/12 ; H01L27/22 ; H01L21/768 ; H01L21/3213 ; H01L21/285
Abstract:
A conductive via disposed beneath a magnetic device and aligned therewith. In certain embodiments, an electrode formed on the conductive via may be polished to eliminate step functions or seams originating at the conductive via from propagating up through the various deposited layers. This integration approach allows for improved scaling of the MRAM devices to, for example, a 45 nanometer node.
Public/Granted literature
- US20150236254A1 Method of Integration of a Magnetoresistive Structure Public/Granted day:2015-08-20
Information query
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