Invention Grant
- Patent Title: Interconnect structure and method of forming the same
- Patent Title (中): 互连结构及其形成方法
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Application No.: US14987493Application Date: 2016-01-04
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Publication No.: US09564397B2Publication Date: 2017-02-07
- Inventor: Cheng-Hsiung Tsai , Chung-Ju Lee , Hai-Ching Chen , Shau-Lin Shue , Tien-I Bao
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/528 ; H01L23/532 ; H01L23/498 ; H01L23/522

Abstract:
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a low-k (LK) dielectric layer over a substrate; a first conductive feature and a second conductive feature in the LK dielectric layer; a first spacer along a first sidewall of the first conductive feature; a second spacer along a second sidewall of the second conductive feature, wherein the second sidewall of the second conductive feature faces the first sidewall of the first conductive feature; an air gap between the first spacer and the second spacer; and a third conductive feature over the first conductive feature, wherein the third conductive feature is connected to the first conductive feature.
Public/Granted literature
- US20160118334A1 Interconnect Structure and Method of Forming The Same Public/Granted day:2016-04-28
Information query
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