Invention Grant
- Patent Title: Method for fabrication of interconnection circuitry with electrically conductive features passing through a support and comprising core portions formed using nanoparticle-containing inks
- Patent Title (中): 制造具有导电特征的互连电路的方法，其通过支撑件并且包括使用含纳米颗粒的油墨形成的芯部分
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Application No.: US14602984Application Date: 2015-01-22
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Publication No.: US09570385B2Publication Date: 2017-02-14
- Inventor: Bong-Sub Lee , Cyprian Emeka Uzoh , Charles G. Woychik , Liang Wang , Laura Wills Mirkarimi , Arkalgud R. Sitaram
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Agency: Haynes and Boone, LLP
- Main IPC: H05K3/02
- IPC: H05K3/02 ; H05K3/10 ; H01L23/498 ; H01L21/48 ; H05K1/11 ; H05K1/16 ; H05K3/18
Abstract:
Interposer circuitry (130) is formed on a possibly sacrificial substrate (210) from a porous core (130′) covered by a conductive coating (130″) which increases electrical conductance. The core is printed from nanoparticle ink. Then a support (120S) is formed, e.g. by molding, to mechanically stabilize the circuitry. A magnetic field can be used to stabilize the circuitry while the circuitry or the support are being formed. Other features are also provided.
Public/Granted literature
- US20160218057A1 INTERPOSERS AND FABRICATION METHODS THAT USE NANOPARTICLE INKS AND MAGNETIC FIELDS Public/Granted day:2016-07-28
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