Invention Grant
- Patent Title: Vertical bipolar transistor
- Patent Title (中): 垂直双极晶体管
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Application No.: US14150596Application Date: 2014-01-08
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Publication No.: US09570513B2Publication Date: 2017-02-14
- Inventor: Philippe Boivin , Francesco La Rosa , Julien Delalleau
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Seed IP Law Group LLP
- Priority: FR1350133 20130108
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L27/24 ; H01L45/00 ; H01L27/22 ; H01L29/08

Abstract:
The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed in the first dielectric layer, the control terminal comprising a second semiconductor region formed in the conductive layer, and the second conduction terminal comprising a third semiconductor region formed in the second dielectric layer.
Public/Granted literature
- US20140191179A1 VERTICAL BIPOLAR TRANSISTOR Public/Granted day:2014-07-10
Information query
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