Invention Grant
- Patent Title: Method of fabricating semiconductor MOS device
- Patent Title (中): 制造半导体MOS器件的方法
-
Application No.: US15136982Application Date: 2016-04-24
-
Publication No.: US09577069B1Publication Date: 2017-02-21
- Inventor: Shih-Chieh Pu , Ping-Hung Chiang , Chang-Po Hsiung , Chia-Lin Wang , Nien-Chung Li , Wen-Fang Lee , Shih-Yin Hsiao , Chih-Chung Wang , Kuan-Lin Liu
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Priority: TW105110871A 20160407
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L21/308 ; H01L21/28 ; H01L21/02
Abstract:
A method of fabricating a MOS device is disclosed. A substrate having an active area (AA) silicon portion and shallow trench isolation (STI) region surrounding the active area is provided. A hard mask is formed on the substrate. A portion of the hard mask is removed to form an opening on the AA silicon portion. The opening exposes an edge of the STI region. The AA silicon portion is recessed through the opening to a predetermined depth to form a silicon spacer along a sidewall of the STI region in a self-aligned manner. An oxidation process is performed to oxidize the AA silicon portion and the silicon spacer to form a gate oxide layer.
Information query
IPC分类:
