Invention Grant
- Patent Title: Method for controlled recessing of materials in cavities in IC devices
- Patent Title (中): IC器件空腔中材料受控凹陷的方法
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Application No.: US14964746Application Date: 2015-12-10
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Publication No.: US09589850B1Publication Date: 2017-03-07
- Inventor: Chanro Park , Kisup Chung , Sivananda Kanakasabapathy
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman US NY Armonk
- Assignee: GLOBALFOUNDRIES INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: GLOBALFOUNDRIES INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: KY Grand Cayman US NY Armonk
- Agency: Ditthavong & Steiner, P.C.
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/49

Abstract:
Controlled recessing of materials in cavities and resulting devices are disclosed. Embodiments include providing a dielectric layer over first-type and second-type transistor regions, and long and short channel-cavities in the dielectric in each transistor region; conformally forming a gate dielectric layer in the long and short channel-cavities, and on an upper surface of the dielectric; conformally forming a first-type work-function metal layer on the gate dielectric; forming a block-mask over the first-type transistor region; removing the first-type work-function metal from the second-type transistor region; removing the block-mask; conformally forming a second-type work-function metal on all exposed surfaces; forming a metal barrier layer on exposed surfaces and filling the short channel-cavities; filling the long channel-cavities with a conductive material; planarizing all layers down to the upper surface of the dielectric; and applying a tilted ion beam to recess the gate dielectric, first and second type work-function metal, and metal barrier layers.
Information query
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