Invention Grant
US09589962B2 Array of conductive vias, methods of forming a memory array, and methods of forming conductive vias 有权
导电通孔的阵列,形成存储器阵列的方法以及形成导电通孔的方法

Array of conductive vias, methods of forming a memory array, and methods of forming conductive vias
Abstract:
A method of forming conductive vias comprises forming at least three parallel line constructions elevationally over a substrate. The line constructions individually comprise a dielectric top and dielectric sidewalls. A conductive line is formed elevationally over and angles relative to the line constructions. The conductive line comprises a longitudinally continuous portion and a plurality of conductive material extensions that individually extend elevationally inward between immediately adjacent of the line constructions. Etching is conducted elevationally through the longitudinally continuous portion and partially elevationally into the extensions at spaced locations along the conductive line to break-up the longitudinally continuous portion to form individual conductive vias extending elevationally between immediately adjacent of the line constructions. Methods of forming a memory array are also disclosed. Arrays of conductive vias independent of method of manufacture are also disclosed.
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