Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit

Invention Grant

US09590064B2 Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit 有权

Title translation: 在例如在SOI衬底上特别是FDSOI衬底上制造的集成电路的有源区上产生接触的工艺以及相应的集成电路

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Patent Title: Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
Patent Title (中): 在例如在SOI衬底上特别是FDSOI衬底上制造的集成电路的有源区上产生接触的工艺以及相应的集成电路
Application No.: US14962976

Application Date: 2015-12-08
Publication No.: US09590064B2

Publication Date: 2017-03-07
Inventor: Emmanuel Petitprez
Applicant: STMicroelectronics (Crolles 2) SAS
Applicant Address: FR Crolles
Assignee: STMicroelectronics (Crolles 2) SAS
Current Assignee: STMicroelectronics (Crolles 2) SAS
Current Assignee Address: FR Crolles
Agency: Gardere Wynne Sewell LLP
Priority: FR1555588 20150618
Main IPC: H01L21/8234
IPC: H01L21/8234 ; H01L29/423 ; H01L21/768 ; H01L29/51 ; H01L21/02 ; H01L21/84 ; H01L29/06 ; H01L21/283

Process for producing a contact on an active zone of an integrated circuit, for example produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit

Abstract:

An integrated circuit includes an active zone lying above a semiconductor substrate. A cavity borders the active zone and extends, in an insulating zone, as far as into the vicinity of a semiconductor region. An insulating multilayer is provided and an electrically conductive contact extends within the insulating multilayer to emerging onto the active zone and into the cavity. The insulating multilayer includes a first insulating layer covering the active zone outside the contact and lining the walls of the cavity. An additional insulating layer covers the portion of the first insulating layer lining the walls of the cavity. The contact reaches the additional insulating layer in the cavity. An insulating region lies on top of the first insulating layer and the additional insulating layer made from insulating material around the contact.

Abstract(Chinese):

集成电路包括位于半导体衬底上方的有源区。空腔与有源区域相邻并且在绝缘区域中延伸到半导体区域附近。提供绝缘多层，并且导电接触件在绝缘层内延伸出来，以露出到活性区域并进入空腔。绝缘多层包括覆盖接触外部的有源区并衬在空腔的壁上的第一绝缘层。附加的绝缘层覆盖衬在空腔壁上的第一绝缘层的部分。触点到达腔中的附加绝缘层。绝缘区域位于第一绝缘层的顶部和由接触件周围的绝缘材料制成的附加绝缘层。

Public/Granted literature

US20160372562A1 PROCESS FOR PRODUCING A CONTACT ON AN ACTIVE ZONE OF AN INTEGRATED CIRCUIT, FOR EXAMPLE PRODUCED ON AN SOI SUBSTRATE, IN PARTICULAR AN FDSOI SUBSTRATE, AND CORRESPONDING INTEGRATED CIRCUIT Public/Granted day:2016-12-22

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺