Invention Grant
- Patent Title: Plasma etching and stealth dicing laser process
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Application No.: US14481051Application Date: 2014-09-09
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Publication No.: US09601437B2Publication Date: 2017-03-21
- Inventor: Guido Albermann , Sascha Moeller , Thomas Rohleder , Martin Lapke , Hartmut Buenning
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/304 ; H01L21/306 ; H01L23/544 ; H01L21/683

Abstract:
Consistent with an example embodiment, a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side, comprises mounting the front-side of the wafer onto protective foil. A laser is applied to saw lane areas on the backside of the wafer, at a first focus depth to define a modification zone; the modification zone defined at a pre-determined depth within active device boundaries and the active device boundaries defined by the saw lane areas. The protective foil is stretched to separate IC device die from one another and expose active device side-walls. With dry-etching of the active device side-walls, the modification zone is substantially removed.
Public/Granted literature
- US20160071770A1 PLASMA ETCHING AND STEALTH DICING LASER PROCESS Public/Granted day:2016-03-10
Information query
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