发明授权
- 专利标题： Dummy metal gate structures to reduce dishing during chemical-mechanical polishing
-
申请号： US14959786申请日： 2015-12-04
-
公开(公告)号： US09601489B2公开(公告)日： 2017-03-21
- 发明人: Chan-Hong Chern , Chih-Chang Lin , Julie Tran , Jacklyn Chang
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater Matsil, LLP
- 主分类号： H01L27/02
- IPC分类号： H01L27/02 ; H01L27/092 ; H01L21/321 ; H01L29/423 ; H01L21/8238
摘要：
The described embodiments of mechanisms for placing dummy gate structures next to and/or near a number of wide gate structures reduce dishing effect for gate structures during chemical-mechanical polishing of gate layers. The arrangements of dummy gate structures and the ranges of metal pattern density have been described. Wide gate structures, such as analog devices, can greatly benefit from the reduction of dishing effect.
公开/授权文献
信息查询
IPC分类:
