Invention Grant
- Patent Title: Methods of forming a semiconductor circuit element and semiconductor circuit element
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Application No.: US14812245Application Date: 2015-07-29
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Publication No.: US09608110B2Publication Date: 2017-03-28
- Inventor: Peter Baars , Carsten Grass
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Priority: DE102014221371 20141021
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/28 ; H01L21/8234 ; H01L29/78 ; H01L27/088 ; H01L29/66 ; H01L29/51 ; H01L21/8238 ; H01L27/092 ; H01L27/11592

Abstract:
The present disclosure provides methods of forming a semiconductor circuit element and a semiconductor circuit element, wherein the semiconductor circuit element includes a first semiconductor device with a first gate structure disposed over a first active region of a semiconductor substrate and a second semiconductor device with a second gate structure disposed over a second active region of the semiconductor substrate, the first gate structure comprising a ferroelectric material buried into the first active region before a gate electrode material is formed on the ferroelectric material and the second gate structure comprising a high-k material different from the ferroelectric material.
Public/Granted literature
- US20160111549A1 METHODS OF FORMING A SEMICONDUCTOR CIRCUIT ELEMENT AND SEMICONDUCTOR CIRCUIT ELEMENT Public/Granted day:2016-04-21
Information query
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