Invention Grant
- Patent Title: Methods for fabricating integrated circuits with improved active regions
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Application No.: US14538850Application Date: 2014-11-12
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Publication No.: US09620418B2Publication Date: 2017-04-11
- Inventor: Liang Li , Wei Lu , Lian Choo Goh , Yung Fu Alfred Chong , Fangyue Liu , Alex See
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Lorenz & Kopf, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/02 ; H01L21/265 ; H01L21/266 ; H01L21/311

Abstract:
Methods for fabricating integrated circuits having improved active regions are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate having an upper surface and including active regions and isolation regions formed in a low voltage device area and in a high voltage device area. The method includes selectively forming voids between the isolation regions and the active regions in the high voltage device area to expose active side surfaces. The method further includes oxidizing the upper surface and the active side surfaces to form a gate oxide layer over the low voltage device area and the high voltage device area.
Public/Granted literature
- US20160133524A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH IMPROVED ACTIVE REGIONS Public/Granted day:2016-05-12
Information query
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