Invention Grant
- Patent Title: Power gate for latch-up prevention
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Application No.: US15060150Application Date: 2016-03-03
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Publication No.: US09646680B2Publication Date: 2017-05-09
- Inventor: Srinivasa Raghavan Sridhara
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Main IPC: G11C11/40
- IPC: G11C11/40 ; G11C11/417 ; G11C5/14 ; G11C11/412 ; G11C11/4074

Abstract:
In an embodiment of the invention, power is provided to an SRAM array without causing latch-up by charging the positive voltage node in the SRAM array and the Nwell regions in the SRAM at approximately the same rate.
Public/Granted literature
- US20160189768A1 Power Gate for Latch-Up Prevention Public/Granted day:2016-06-30
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