A chip component includes a substrate, an element circuit network including a plurality of element parts formed on the substrate, an external connection electrode provided on a surface of the substrate to provide external connection for the element circuit network, a plurality of fuses formed on the substrate and disconnectably connecting each of the plurality of element parts to the external connection electrode, a solder layer formed on an external connection terminal of the external connection electrode and a resin film which covers the surface of the substrate and other surface which intersects the surface of the substrate.