Invention Grant
- Patent Title: Integrating multi-output power converters having vertically stacked semiconductor chips
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Application No.: US14938422Application Date: 2015-11-11
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Publication No.: US09653388B2Publication Date: 2017-05-16
- Inventor: Marie Denison , Brian Ashley Carpenter , Osvaldo Jorge Lopez , Juan Alejandro Herbsommer , Jonathan Noquil
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L25/07
- IPC: H01L25/07 ; H01L23/495 ; H01L23/00 ; H01L21/50 ; H01L25/065 ; H01L25/16 ; H01L25/18 ; H01L25/00 ; H01L21/56 ; H01L23/498

Abstract:
A electronic multi-output device having a substrate including a pad and pins. A composite first chip has a first and a second transistor integrated so that the first terminals of the transistors are merged into a common terminal on one chip surface. Patterned second and third terminals are on the opposite chip surface. The common first terminal is attached to the substrate pad. The second terminals are connected by discrete first and second metal clips to respective substrate pins. A composite second chip has a third and a fourth transistor integrated so that the second terminals of the transistors are merged into a common terminal on one chip surface. Patterned first and third terminals are on the opposite chip surface. The second chip is flipped to be vertically attached with its first terminals to the first and second clips, respectively. The third terminals are connected by discrete clips to respective substrate pins. The common second terminal is connected by a common clip to a substrate pin.
Public/Granted literature
- US20160064313A1 Integrating Multi-Output Power Converters Having Vertically Stacked Semiconductor Chips Public/Granted day:2016-03-03
Information query
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