- 专利标题: Dual-bit 3-T high density MTPROM array
-
申请号: US14961484申请日: 2015-12-07
-
公开(公告)号: US09659604B1公开(公告)日: 2017-05-23
- 发明人: Ramesh Raghavan , Balaji Jayaraman , Janakiraman Viraraghavan , Thejas Kempanna , Rajesh Reddy Tummuru , Toshiaki Kirihata
- 申请人: GLOBALFOUNDRIES INC.
- 申请人地址: KY Grand Cayman
- 专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人地址: KY Grand Cayman
- 代理机构: Scully Scott Murphy and Presser
- 代理商 Frank Digiglio
- 主分类号: G11C11/56
- IPC分类号: G11C11/56 ; G11C7/06 ; G11C7/12 ; G11C7/18 ; G11C5/14
摘要:
A multi-time programmable memory (MTPM) memory cell and method of operating. Each MTPM bit cell including a first FET transistor and a second FET transistor having a first common connection, and said second FET transistor and a third FET transistor having a second common connection, said first and second connected FET transistors programmable to store a first bit value, and said second FET and said third connected FET transistors programmable to store a second bit value, wherein said first FET transistor exhibits a low threshold voltage value (LVT), said second FET transistor exhibits an elevated threshold voltage value HVT and said third FET transistor exhibits a threshold value LVT lower than HVT. The MTPM cell enables two bits of information to be stored as default bit values like an electrical fuse. To store opposite bit values, the LVT transistors are programmed such that their threshold voltage is higher than that of HVT.
公开/授权文献
- US20170162234A1 DUAL-BIT 3-T HIGH DENSITY MTPROM ARRAY 公开/授权日:2017-06-08
信息查询