An IC includes a memory core logic unit, an output unit, and an input unit. The memory logic unit is coupled to a plurality of bit cells configured to control read and write of data to and from the plurality of bit cells. The input unit is formed on the integrated circuit. The output unit is formed on the integrated circuit. The input unit includes a second plurality of multiplexers for signal selection, at least one lock up latch for storing data and configured to increase a hold time for the data, and at least one shadow latch configured to store a copy of the data stored in the at least one lock up latch. The output unit includes a first plurality of multiplexers for signal selection and at least one high phase pass latch for storing data.