Invention Grant
- Patent Title: Self-aligned floating gate in a vertical memory structure
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Application No.: US15207877Application Date: 2016-07-12
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Publication No.: US09698022B2Publication Date: 2017-07-04
- Inventor: Randy J. Koval
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/28 ; H01L29/788 ; G11C16/04 ; H01L27/11556 ; H01L29/78 ; H01L21/02 ; H01L21/311 ; H01L21/3213 ; H01L27/11519 ; H01L27/11521 ; H01L29/04 ; H01L29/10 ; H01L29/16 ; H01L29/49 ; H01L27/11524

Abstract:
Methods for building a memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielectric film. The floating gate is flanked by the memory cell body and the control gate to form a memory cell, and the self-aligned floating gate is at least as thick as the control gate.
Public/Granted literature
- US20170011928A1 SELF-ALIGNED FLOATING GATE IN A VERTICAL MEMORY STRUCTURE Public/Granted day:2017-01-12
Information query
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