Invention Grant
- Patent Title: Semiconductor device with stacked structure of memory cells over sensing amplifiers, circuit board, and electronic device
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Application No.: US14872535Application Date: 2015-10-01
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Publication No.: US09704562B2Publication Date: 2017-07-11
- Inventor: Tatsuya Onuki , Kiyoshi Kato , Wataru Uesugi , Takahiko Ishizu
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2014-208996 20141010; JP2014-227326 20141107; JP2015-148775 20150728
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C11/4091 ; G11C7/02 ; G11C11/4094 ; G11C11/4097 ; H01L27/108 ; G11C5/02

Abstract:
A semiconductor device with low power consumption or a semiconductor device with a reduced area is provided. The semiconductor device includes a cell array including a first memory cell and a second memory cell; and a sense amplifier circuit including a first sense amplifier and a second sense amplifier. The cell array is over the sense amplifier circuit. The first sense amplifier is electrically connected to the first memory cell through a first wiring BL. The second sense amplifier is electrically connected to the second memory cell through a second wiring BL. The first sense amplifier and the second sense amplifier are electrically connected to a wiring GBL. The sense amplifier circuit is configured to select one of a potential of the first wiring BL and a potential of the second wiring BL and output the selected potential to the wiring GBL.
Public/Granted literature
- US20160104521A1 SEMICONDUCTOR DEVICE, CIRCUIT BOARD, AND ELECTRONIC DEVICE Public/Granted day:2016-04-14
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