Invention Grant
- Patent Title: Semiconductor device and method of forming low profile fan-out package with vertical interconnection units
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Application No.: US14038575Application Date: 2013-09-26
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Publication No.: US09704780B2Publication Date: 2017-07-11
- Inventor: Pandi C. Marimuthu , Il Kwon Shim , Yaojian Lin , Won Kyoung Choi
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Pte. Ltd.
- Current Assignee: STATS ChipPAC, Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/48 ; H01L23/00 ; H01L23/498 ; H01L25/065 ; H01L21/56 ; H01L23/538

Abstract:
A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure. A plurality of vias is formed through the insulating layer and into the first interconnect structure with the second interconnect structure disposed within the vias.
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