Invention Grant
- Patent Title: Apparatus for offset correction in electronic circuitry and associated methods
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Application No.: US14955008Application Date: 2015-11-30
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Publication No.: US09742397B2Publication Date: 2017-08-22
- Inventor: Gang Yuan , Shouli Yan , Matthew Powell
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Law Offices of Maximilian R. Peterson
- Main IPC: H03F1/02
- IPC: H03F1/02 ; H03K17/687 ; H03F3/45
Abstract:
An apparatus includes a first field effect transistor (FET) that has a body and is coupled in a circuit. The apparatus also includes a second FET that has a body and is coupled in the circuit. The circuit has an offset because of a mismatch. The apparatus further includes an offset correction circuit coupled to the body of the first FET and to the body of the second FET. The offset correction circuit provides a first offset correction signal to the body of the first FET and provides a second offset correction signal to the body of the second FET.
Public/Granted literature
- US20170155386A1 Apparatus for Offset Correction in Electronic Circuitry and Associated Methods Public/Granted day:2017-06-01
Information query
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