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    Multi-Stage Sample and Hold Circuit
    1.
    发明申请
    Multi-Stage Sample and Hold Circuit 有权
    多级采样保持电路

    公开(公告)号：US20160104543A1

    公开(公告)日：2016-04-14

    申请号：US14511085

    申请日：2014-10-09

    Applicant: Silicon Laboratories Inc.

    Inventor： Matthew R. Powell ,  Shouli Yan

    IPC: G11C27/02

    CPC classification number: G11C27/026 ,  G11C27/02 ,  G11C27/024

    Abstract: A circuit may include a first sample node configured to provide a low precision sample of an input signal, a second sample node configured to store a high precision sample of an input signal, and a first switch circuit coupled between an input and the first sample node. The circuit may further include a second switch circuit coupled between the first sample node and the second sample node and configured to limit leakage current that could discharge the second sample node.

    Abstract translation: 电路可以包括被配置为提供输入信号的低精度采样的第一采样节点，被配置为存储输入信号的高精度采样的第二采样节点以及耦合在输入和第一采样节点之间的第一开关电路 。 电路还可以包括耦合在第一采样节点和第二采样节点之间的第二开关电路，并且被配置为限制可以对第二采样节点放电的漏电流。

    Dual-Path Comparator and Method
    2.
    发明申请
    Dual-Path Comparator and Method 有权
    双路比较器和方法

    公开(公告)号：US20150061913A1

    公开(公告)日：2015-03-05

    申请号：US14016948

    申请日：2013-09-03

    Applicant: Silicon Laboratories Inc.

    Inventor： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen

    IPC: H03M1/42

    CPC classification number: H03M1/42 ,  H03M1/0692 ,  H03M1/188 ,  H03M1/38 ,  H03M1/403 ,  H03M1/466

    Abstract: A method includes receiving a differential voltage signal at first and second inputs of a comparator and selectively providing the differential voltage signal to one of a first conversion path and a second conversion path of the comparator during a conversion phase to determine a digital value corresponding to the differential voltage signal. The first and second conversion paths including first and second pluralities of gain stages, respectively. The method further includes coupling the selected one of the first conversion path and the second conversion path to an output to provide the digital value.

    Abstract translation: 一种方法包括在比较器的第一和第二输入处接收差分电压信号，并且在转换阶段期间选​​择性地将差分电压信号提供给比较器的第一转换路径和第二转换路径中的一个，以确定对应于 差分电压信号。 第一和第二转换路径分别包括第一和第二多个增益级。 该方法还包括将所选择的第一转换路径和第二转换路径中的一个耦合到输出以提供数字值。

    Reference buffer circuits including a non-linear feedback factor
    4.
    发明授权
    Reference buffer circuits including a non-linear feedback factor 有权

    公开(公告)号：US09614528B2

    公开(公告)日：2017-04-04

    申请号：US14562707

    申请日：2014-12-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Mohamed Mostafa Elsayed ,  Shouli Yan

    IPC: H03K3/00 ,  H03K19/0185

    CPC classification number: H03K19/018507

    Abstract: In an embodiment, an apparatus may include an amplifier circuit including a first input to receive a signal, a second input to receive a feedback signal, and an output. The apparatus may further include a buffer circuit including an input coupled to the output of the amplifier and including an output coupled to an output node. The apparatus may also include a feedback circuit coupled between the output node and the second input of the amplifier circuit. The feedback circuit may include at least one non-linear resistor configured to define a feedback ratio that changes in response to a voltage at the output node.

    Multi-stage sample and hold circuit
    5.
    发明授权
    Multi-stage sample and hold circuit 有权
    多级采样保持电路

    公开(公告)号：US09576679B2

    公开(公告)日：2017-02-21

    申请号：US14511085

    申请日：2014-10-09

    Applicant: Silicon Laboratories Inc.

    Inventor： Matthew R Powell ,  Shouli Yan

    IPC: G11C27/02

    CPC classification number: G11C27/026 ,  G11C27/02 ,  G11C27/024

    Abstract: A circuit may include a first sample node configured to provide a low precision sample of an input signal, a second sample node configured to store a high precision sample of an input signal, and a first switch circuit coupled between an input and the first sample node. The circuit may further include a second switch circuit coupled between the first sample node and the second sample node and configured to limit leakage current that could discharge the second sample node.

    Abstract translation: 电路可以包括被配置为提供输入信号的低精度采样的第一采样节点，被配置为存储输入信号的高精度采样的第二采样节点以及耦合在输入和第一采样节点之间的第一开关电路 。 电路还可以包括耦合在第一采样节点和第二采样节点之间的第二开关电路，并且被配置为限制可以对第二采样节点放电的漏电流。

    Dual-path comparator and method
    7.
    发明授权
    Dual-path comparator and method 有权
    双路比较器和方法

    公开(公告)号：US09041584B2

    公开(公告)日：2015-05-26

    申请号：US14016948

    申请日：2013-09-03

    Applicant: Silicon Laboratories Inc.

    Inventor： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen

    IPC: H03M1/12 ,  H03M1/42 ,  H03M1/38 ,  H03M1/40

    CPC classification number: H03M1/42 ,  H03M1/0692 ,  H03M1/188 ,  H03M1/38 ,  H03M1/403 ,  H03M1/466

    Abstract: A method includes receiving a differential voltage signal at first and second inputs of a comparator and selectively providing the differential voltage signal to one of a first conversion path and a second conversion path of the comparator during a conversion phase to determine a digital value corresponding to the differential voltage signal. The first and second conversion paths including first and second pluralities of gain stages, respectively. The method further includes coupling the selected one of the first conversion path and the second conversion path to an output to provide the digital value.

    Abstract translation: 一种方法包括在比较器的第一和第二输入处接收差分电压信号，并且在转换阶段期间选​​择性地将差分电压信号提供给比较器的第一转换路径和第二转换路径中的一个，以确定对应于 差分电压信号。 第一和第二转换路径分别包括第一和第二多个增益级。 该方法还包括将所选择的第一转换路径和第二转换路径中的一个耦合到输出以提供数字值。

    Reference Buffer Circuits Including a Non-linear Feedback Factor
    9.
    发明申请
    Reference Buffer Circuits Including a Non-linear Feedback Factor 有权
    包括非线性反馈因子的参考缓冲电路

    公开(公告)号：US20160164522A1

    公开(公告)日：2016-06-09

    申请号：US14562707

    申请日：2014-12-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Mohamed Mostafa Elsayed ,  Shouli Yan

    IPC: H03K19/0185

    CPC classification number: H03K19/018507

    Abstract: In an embodiment, an apparatus may include an amplifier circuit including a first input to receive a signal, a second input to receive a feedback signal, and an output. The apparatus may further include a buffer circuit including an input coupled to the output of the amplifier and including an output coupled to an output node. The apparatus may also include a feedback circuit coupled between the output node and the second input of the amplifier circuit. The feedback circuit may include at least one non-linear resistor configured to define a feedback ratio that changes in response to a voltage at the output node.

    Abstract translation: 在一个实施例中，装置可以包括放大器电路，其包括用于接收信号的第一输入端，用于接收反馈信号的第二输入端和输出端。 该装置还可以包括缓冲器电路，其包括耦合到放大器的输出并包括耦合到输出节点的输出的输入。 该装置还可以包括耦合在输出节点和放大器电路的第二输入端之间的反馈电路。 反馈电路可以包括至少一个非线性电阻器，其被配置为定义响应于输出节点处的电压而改变的反馈比率。

    LINEAR REGULATOR HAVING A CLOSED LOOP FREQUENCY RESPONSE BASED ON A DECOUPLING CAPACITANCE
    10.
    发明申请
    LINEAR REGULATOR HAVING A CLOSED LOOP FREQUENCY RESPONSE BASED ON A DECOUPLING CAPACITANCE 有权
    线性稳压器具有基于解耦电容的闭环频率响应

    公开(公告)号：US20160147239A1

    公开(公告)日：2016-05-26

    申请号：US14551923

    申请日：2014-11-24

    Applicant: Silicon Laboratories Inc.

    Inventor： Shouli Yan ,  Axel Thomsen ,  Praveen Kallam

    IPC: G05F1/575

    CPC classification number: G05F1/575 ,  G05F1/56 ,  G05F1/573

    Abstract: A method includes using a pass device of a linear regulator to provide an output signal to an output of the linear regulator in response to a signal that is received at a control terminal of the pass device. The method includes using the linear regulator to regulate the signal received at the control terminal based at least in part on the output signal; and controlling a closed loop frequency response of the linear regulator to cause a direct current (DC) gain of the linear regulator to extend to a frequency near or at frequency of a zero that is associated with a decoupling capacitor that is coupled to the output of the linear regulator.

    Abstract translation: 一种方法包括使用线性调节器的通过装置来响应于在通过装置的控制端子处接收的信号而向线性调节器的输出提供输出信号。 该方法包括使用线性调节器至少部分地基于输出信号来调节在控制终端处接收到的信号; 以及控制所述线性调节器的闭环频率响应，以使所述线性调节器的直流（DC）增益扩展到与耦合到所述线性调节器的输出的去耦电容器相关联的零点附近或频率处的频率 线性调节器。

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