Invention Grant
- Patent Title: Method of forming trenches with different depths
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Application No.: US15178229Application Date: 2016-06-09
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Publication No.: US09779984B1Publication Date: 2017-10-03
- Inventor: Chao-Hsun Wang , Hsien-Cheng Wang , Mei-Yun Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/311 ; H01L29/43 ; H01L29/08 ; H01L21/8234 ; H01L29/40 ; H01L23/532 ; H01L23/522

Abstract:
A method of fabricating a semiconductor device includes forming a first dielectric layer over a substrate that includes a gate structure, forming a first trench in the first dielectric layer, forming dielectric spacers along sidewalls of the first trench, removing a portion of the dielectric spacers to expose a portion of the sidewalls, forming a first metal feature in the first trench over the another portion of the dielectric spacers and along the exposed portions of the sidewalls of the first trench, forming a second dielectric layer over the first metal feature and the gate structure and forming a second trench through the second dielectric layer to expose a portion of the first metal feature and a third trench through the second dielectric layer and the first dielectric layer to expose a portion of the gate structure in the same etching process.
Public/Granted literature
- US20170278744A1 METHOD OF FORMING TRENCHES WITH DIFFERENT DEPTHS Public/Granted day:2017-09-28
Information query
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