Methods for making a vertical transistor and controlling channel length. A fin is formed over a semiconductor substrate. A bottom source/drain region is formed below the fin. A bottom spacer is formed above the source/drain region. A first sacrificial layer is formed around the fin. A second sacrificial layer is formed around the first sacrificial layer. A portion of the first sacrificial layer is removed to create a recess between sidewalls of the second sacrificial layer. A nitride material is deposited into the recess. The second sacrificial layer and remaining portions of the first sacrificial layer are removed. A dielectric layer is deposited on the nitride material and exposed portions of the fin. A gate electrode is formed over sidewalls of the fin.