A device for conversion of an analog signal into a digital signal includes a clock signal generator and a ramp generator configured for delivering a rising voltage ramp. A comparator is configured for comparing the value of the analog signal and the value of the voltage ramp and for generating a comparison signal taking a first logical value when the two values are equal. A signal generator is configured for generating a counter signal equal to the inverse of the clock signal if the comparison signal takes its first value while the clock signal is in the high state, or a counter signal equal to the clock signal if the clock signal is in the low state. A counter is configured for counting the number of edges of the counter signal.