Invention Grant
- Patent Title: Method for manufacturing multi-chip package
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Application No.: US15054845Application Date: 2016-02-26
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Publication No.: US09887102B2Publication Date: 2018-02-06
- Inventor: Tai-Tsung Hsu , Cheng-Yu Chiang , Miao-Wen Chen , Wen-Jung Chiang , Hsin-Hung Lee
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW102105957A 20130221
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/36 ; H01L23/552 ; H01L23/31 ; H01L21/428 ; H01L23/367 ; H01L23/58 ; H01L25/065
Abstract:
A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
Public/Granted literature
- US20160181126A1 METHOD FOR MANUFACTURING MULTI-CHIP PACKAGE Public/Granted day:2016-06-23
Information query
IPC分类:
