Invention Grant
- Patent Title: Semiconductor module arrangement and method for producing a semiconductor module arrangement
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Application No.: US14161246Application Date: 2014-01-22
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Publication No.: US09888601B2Publication Date: 2018-02-06
- Inventor: Patrick Jones , Christoph Koch , Michael Sielaff
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102013100701 20130124
- Main IPC: G06F1/16
- IPC: G06F1/16 ; H05K5/00 ; H05K7/00 ; H05K7/02 ; H05K7/20 ; H05K7/14

Abstract:
A semiconductor module arrangement is provided having a first subassembly, a second subassembly and a third subassembly. The third subassembly has a quantity of adjustment pins which are fixedly connected to one another. The first subassembly has a number N1 of first adjustment openings, and the second subassembly has a number N2 of second adjustment openings. Each of the adjustment pins engages into a different one of the first adjustment openings and/or into one of the second adjustment openings. A corresponding method of producing the semiconductor module arrangement is also provided.
Public/Granted literature
- US20140204536A1 Semiconductor Module Arrangement and Method for Producing a Semiconductor Module Arrangement Public/Granted day:2014-07-24
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