Invention Grant
- Patent Title: Multi-level memory management
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Application No.: US15400122Application Date: 2017-01-06
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Publication No.: US09921961B2Publication Date: 2018-03-20
- Inventor: Christopher B. Wilkerson , Alaa R. Alameldeen , Zhe Wang , Zeshan A. Chishti
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G06F12/0804 ; G06F12/12

Abstract:
A multi-level memory management circuit can remap data between near and far memory. In one embodiment, a register array stores near memory addresses and far memory addresses mapped to the near memory addresses. The number of entries in the register array is less than the number of pages in near memory. Remapping logic determines that a far memory address of the requested data is absent from the register array and selects an available near memory address from the register array. Remapping logic also initiates writing of the requested data at the far memory address to the selected near memory address. Remapping logic further writes the far memory address to an entry of the register array corresponding to the selected near memory address.
Public/Granted literature
- US20170277633A1 MULTI-LEVEL MEMORY MANAGEMENT Public/Granted day:2017-09-28
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