Invention Grant
- Patent Title: High-speed word line decoder and level-shifter
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Application No.: US15070963Application Date: 2016-03-15
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Publication No.: US09940987B2Publication Date: 2018-04-10
- Inventor: Chulmin Jung , Po-Hung Chen , David Li , Sei Seung Yoon
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Haynes and Boone, LLP
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C8/08 ; G11C8/10 ; G11C8/06 ; G11C5/14

Abstract:
A memory is provided that includes a row decoder that decodes an address into a plurality of decoded signals for selecting a word line to be asserted from a plurality of word lines. Each word line is driven through a decoder level-shifter that processes the decoded signals. Each decoder level-shifter corresponds to a unique combination of the decoded signals. The row decoder is in a logic power domain such that the decoded signals are asserted to a logic power supply voltage. When a decoder level-shifter's unique combination of decoded signals are asserted by the row decoder, the decoder level-shifter drives the corresponding word line with a memory power supply voltage for a memory power domain.
Public/Granted literature
- US20160276005A1 HIGH-SPEED WORD LINE DECODER AND LEVEL-SHIFTER Public/Granted day:2016-09-22
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