Invention Grant
- Patent Title: Tuning strain in semiconductor devices
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Application No.: US15220700Application Date: 2016-07-27
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Publication No.: US09941404B2Publication Date: 2018-04-10
- Inventor: Jean-Pierre Colinge , Kuo-Cheng Ching , Gwan Sin Chang , Zhiqiang Wu , Chih-Hao Wang , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/775 ; H01L21/02 ; H01L21/306 ; H01L21/324 ; H01L29/165 ; H01L29/06

Abstract:
A Fin Field-Effect Transistor (FinFET) includes a semiconductor layer over a substrate, wherein the semiconductor layer forms a channel of the FinFET. A first silicon germanium oxide layer is over the substrate, wherein the first silicon germanium oxide layer has a first germanium percentage. A second silicon germanium oxide layer is over the first silicon germanium oxide layer. The second silicon germanium oxide layer has a second germanium percentage greater than the first germanium percentage. A gate dielectric is on sidewalls and a top surface of the semiconductor layer. A gate electrode is over the gate dielectric.
Public/Granted literature
- US20160336445A1 Tuning Strain in Semiconductor Devices Public/Granted day:2016-11-17
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