Bias circuitry for depletion mode amplifiers
Abstract:
A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.
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