发明授权
- 专利标题： Method for fabricating a fin field effect transistor and a shallow trench isolation
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申请号： US15054113申请日： 2016-02-25
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公开(公告)号： US09991154B2公开(公告)日： 2018-06-05
- 发明人: Wei Ken Lin , Jia-Ming Lin , Hsien-Che Teng , Yung-Chou Shih , Kun-Dian She , Lichia Yang , Yun-Wen Chu
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址： TW Hsinchu
- 代理机构： JCIPRNET
- 主分类号： H01L21/76
- IPC分类号： H01L21/76 ; H01L21/762 ; H01L21/02 ; H01L29/78 ; H01L29/66
摘要：
A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.
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