The invention relates to a dynamic memory having memory cells which are assembled in blocks (B) and can be selected through bit lines (BL) and word lines (WL). The blocks are assembled in at least one group of blocks (BG). In a first operating mode, no more than one of the word lines (WL) is simultaneously selected for each group of blocks (BG). In a second operating mode, more than one word line (WL) is simultaneously selected for each group of blocks (BG).