A fully integrated CMOS multi-element phased-array transmitter (transmitter)includes, in part, on-chip power amplifiers (PA) (262), with integrated output matching. The transmitter is adapted to be configured as a two-dimensional 2-by-2 array or as a one dimensional l-by-4 array. The transmitter uses a two step up-conversion architecture with an IF frequency of 4.8GHz. Double-quadrature architecture for the up-conversion stages attenuates the signal at image frequencies. The phase selectors (252, 254) in each transmitter path have independent access to all the phases of the VCO (202). The double quadrature architecture results in two sets of phase selectors for each path, one for the in-phase (1) and one for the quadrature phase (Q) of the LO signal. The phase selection is done in two stages, with the first stage determining the desired VCO differential phase pair and the next stage selecting the appropriate polarity. An on-chip Balun is used for differential to single-ended conversion.