DIELECTRIC INTERFACE FOR GROUP III-V SEMICONDUCTOR DEVICE

Invention Application

WO2007064492A1 DIELECTRIC INTERFACE FOR GROUP III-V SEMICONDUCTOR DEVICE 审中-公开

Title translation: III-V族半导体器件的介电接口

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Patent Title: DIELECTRIC INTERFACE FOR GROUP III-V SEMICONDUCTOR DEVICE
Patent Title (中): III-V族半导体器件的介电接口
Application No.: PCT/US2006/044601

Application Date: 2006-11-17
Publication No.: WO2007064492A1

Publication Date: 2007-06-07
Inventor: BRASK, Justin, K. , DATTA, Suman , DOCZY, Mark, L. , BLACKWELL, James, M. , METZ, Matthew, V. , KAVALIEROS, Jack, T. , CHAU, Robert, S.
Applicant: INTEL CORPORATION , BRASK, Justin, K. , DATTA, Suman , DOCZY, Mark, L. , BLACKWELL, James, M. , METZ, Matthew, V. , KAVALIEROS, Jack, T. , CHAU, Robert, S.
Applicant Address: 2200 Mission College Boulevard, Santa Clara, CA 95052 US
Assignee: INTEL CORPORATION,BRASK, Justin, K.,DATTA, Suman,DOCZY, Mark, L.,BLACKWELL, James, M.,METZ, Matthew, V.,KAVALIEROS, Jack, T.,CHAU, Robert, S.
Current Assignee: INTEL CORPORATION,BRASK, Justin, K.,DATTA, Suman,DOCZY, Mark, L.,BLACKWELL, James, M.,METZ, Matthew, V.,KAVALIEROS, Jack, T.,CHAU, Robert, S.
Current Assignee Address: 2200 Mission College Boulevard, Santa Clara, CA 95052 US
Agency: VINCENT, Lester, J. et al.
Priority: US11/292,399 20051130
Main IPC: H01L21/314
IPC: H01L21/314 ; H01L29/51 ; H01L21/28

DIELECTRIC INTERFACE FOR GROUP III-V SEMICONDUCTOR DEVICE

Abstract:

A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.

Abstract(Chinese):

描述了III-V族半导体器件及其制造方法。高k电介质通过硫族化物区域连接到约束区域。

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Global Dossier Patent Scope Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/314	......无机层（H01L21/3105，H01L21/32优先）