A structure including a first semiconductor chip 20 with front and rear surfaces 24, 26 and a cavity 36 in the rear surface. A second semiconductor chip 70 is mounted within the cavity. The first chip 20 may have vias 48 extending from the cavity to the front surface and via conductors 54 within these vias serving to connect the additional microelectronic element 70 to the active elements of the first chip 20. The structure may have a volume comparable to that of the first chip 20 alone and yet provide the functionality of a multi-chip assembly. A composite chip 720 incorporating a body 722 and a layer 702 of semiconductor material mounted on a front surface 724 of the body similarly may have a cavity 736 extending into the body from the rear surface 726 and may have an additional microelectronic element 770 mounted in such cavity 736.