Invention Application
WO2015112308A1 HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
审中-公开
高电阻SOI波形及其制造方法
- Patent Title: HIGH RESISTIVITY SOI WAFERS AND A METHOD OF MANUFACTURING THEREOF
- Patent Title (中): 高电阻SOI波形及其制造方法
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Application No.: PCT/US2014/072546Application Date: 2014-12-29
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Publication No.: WO2015112308A1Publication Date: 2015-07-30
- Inventor: PEIDOUS, Igor , KOMMU, Srikanth , WANG, Gang , THOMAS, Shawn G.
- Applicant: SUNEDISON SEMICONDUCTOR LIMITED , PEIDOUS, Igor
- Applicant Address: 9 Battery Road #15-01, Straits Trading Building Singapore 049910 SG
- Assignee: SUNEDISON SEMICONDUCTOR LIMITED,PEIDOUS, Igor
- Current Assignee: SUNEDISON SEMICONDUCTOR LIMITED,PEIDOUS, Igor
- Current Assignee Address: 9 Battery Road #15-01, Straits Trading Building Singapore 049910 SG
- Agency: SCHUTH, Richard A. et al.
- Priority: US61/930,507 20140123
- Main IPC: H01L21/762
- IPC: H01L21/762
Abstract:
A high resistivity single crystal semiconductor handle structure for use in the manufacture of SOI structure is provided. The handle structure comprises an intermediate semiconductor layer between the handle substrate and the buried oxide layer. The intermediate semiconductor layer comprises a polycrystalline, amorphous, nanocrystalline, or monocrystalline structure and comprises a material selected from the group consisting of Si 1-x Ge x , Si 1-x C x , Si 1-x-y Ge x Sn y , Si 1-x-y-z Ge x Sn y C z , Ge 1-x Sn x , group IIIA-nitrides, semiconductor oxides, and any combination thereof.
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