发明申请
- 专利标题： MICROELECTRONIC CONDUCTIVE ROUTES AND METHODS OF MAKING THE SAME
- 专利标题（中）： 微电子导电路线及其制造方法
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申请号： PCT/US2015/028209申请日： 2015-04-29
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公开(公告)号： WO2016175782A1公开(公告)日： 2016-11-03
- 发明人: CHAWLA, Jasmeet S. , HOURANI, Rami , KOBRINSKY, Mauro J. , GSTREIN, Florian , CLENDENNING, Scott B. , ROBERTS, Jeanette M.
- 申请人： INTEL CORPORATION , CHAWLA, Jasmeet S. , HOURANI, Rami , KOBRINSKY, Mauro J. , GSTREIN, Florian , CLENDENNING, Scott B. , ROBERTS, Jeanette M.
- 申请人地址： 2200 Mission College Boulevard Santa Clara, California 95054 US
- 专利权人： INTEL CORPORATION,CHAWLA, Jasmeet S.,HOURANI, Rami,KOBRINSKY, Mauro J.,GSTREIN, Florian,CLENDENNING, Scott B.,ROBERTS, Jeanette M.
- 当前专利权人： INTEL CORPORATION,CHAWLA, Jasmeet S.,HOURANI, Rami,KOBRINSKY, Mauro J.,GSTREIN, Florian,CLENDENNING, Scott B.,ROBERTS, Jeanette M.
- 当前专利权人地址： 2200 Mission College Boulevard Santa Clara, California 95054 US
- 代理机构： WINKLE, Robert G.
- 主分类号： H01L21/768
- IPC分类号： H01L21/768
摘要：
A conductive route structure may be formed comprising a conductive trace and a conductive via, wherein the conductive via directly contacts the conductive trace. In one embodiment, the conductive route structure may be formed by forming a dielectric material layer on the conductive trace. A via opening may be formed through the dielectric material layer to expose a portion of the conductive trace and a blocking layer may be from only on the exposed portion of the conductive trace. A barrier line may be formed on sidewalls of the via opening and the blocking layer may thereafter be removed. A conductive via may then be formed within the via opening, wherein the conductive via directly contacts the conductive trace.
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