Invention Application
WO2017019134A1 POLISHING STOP LAYER(S) FOR PROCESSING ARRAYS OF SEMICONDUCTOR ELEMENTS
审中-公开
抛光停止层(S)用于处理半导体元件阵列
- Patent Title: POLISHING STOP LAYER(S) FOR PROCESSING ARRAYS OF SEMICONDUCTOR ELEMENTS
- Patent Title (中): 抛光停止层(S)用于处理半导体元件阵列
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Application No.: PCT/US2016/027445Application Date: 2016-04-14
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Publication No.: WO2017019134A1Publication Date: 2017-02-02
- Inventor: PINARBASI, Mustafa Michael , HERNANDEZ, Jacob Anthony , DATTA, Arindom , GAJEK, Marcin Jan , ZANTYE, Parshuram Balkrishna
- Applicant: SPIN TRANSFER TECHNOLOGIES, INC.
- Applicant Address: 45500 Northport Loop West Fremont, California 94538 US
- Assignee: SPIN TRANSFER TECHNOLOGIES, INC.
- Current Assignee: SPIN TRANSFER TECHNOLOGIES, INC.
- Current Assignee Address: 45500 Northport Loop West Fremont, California 94538 US
- Agency: MILLER, Jeffrey A.
- Priority: US62/198,870 20150730; US15/097,576 20160413
- Main IPC: H01L43/12
- IPC: H01L43/12 ; H01L43/02 ; H01L43/10 ; B24B37/22 ; B24B37/24
Abstract:
Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.
Information query
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