Invention Application
- Patent Title: WAFER RECONSTITUTION AND DIE-STITCHING
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Application No.: PCT/US2019/062702Application Date: 2019-11-21
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Publication No.: WO2020112505A3Publication Date: 2020-06-04
- Inventor: DABRAL, Sanjay , ZHAI, Jun , LAI, Kwan-Yu , HU, Kunzhong , RAMACHANDRAN, Vidhya
- Applicant: APPLE INC.
- Applicant Address: One Apple Park Way Cupertino, California 95014 US
- Assignee: APPLE INC.
- Current Assignee: APPLE INC.
- Current Assignee Address: One Apple Park Way Cupertino, California 95014 US
- Agency: AIKIN, Jacob
- Priority: US62/773,135 20181129; US16/503,806 20190705
- Main IPC: H01L21/60
- IPC: H01L21/60 ; H01L23/538 ; H01L21/56 ; H01L21/66 ; H01L23/60 ; H01L23/29
Abstract:
Stitched die packaging techniques and structures are described in which reconstituted chips are formed using wafer reconstitution and die-stitching techniques. In an embodiment, a chip includes a reconstituted chip-level back end of the line (BEOL) build-up structure (310) to connect a die set (110, 110) embedded in an inorganic gap fill material (130).
Public/Granted literature
- WO2020112505A2 WAFER RECONSTITUTION AND DIE-STITCHING Public/Granted day:2020-06-04
Information query
IPC分类:
