Invention Application
- Patent Title: MEMORY ARRAYS COMPRISING STRINGS OF MEMORY CELLS AND METHODS USED IN FORMING A MEMORY ARRAY COMPRISING STRINGS OF MEMORY CELLS
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Application No.: PCT/US2022/036456Application Date: 2022-07-08
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Publication No.: WO2023018499A1Publication Date: 2023-02-16
- Inventor: BARCLAY, M., Jared , HOPKINS, John, D. , HILL, Richard, J. , CHARY, Indra, V. , THONG, Kar, Wui
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: 8000 South Federal Way
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: 8000 South Federal Way
- Agency: MATKIN, Mark, S. et al.
- Priority: US17/399,283 2021-08-11
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11524 ; H01L27/11519 ; H01L27/11582 ; H01L27/1157 ; H01L27/11565
Abstract:
A memory array comprising strings of memory cells comprises laterally- spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier by conducting material that is in a lowest of the conductive tiers and that is directly against multiple of the channel-material strings. The channel-material strings in the laterally-spaced memory blocks comprise part of a memory plane. A wall in the lowest conductive tier is aside the conducting material. The wall is in a region that is edge-of-plane relative to the memory plane. The edge-of-plane region comprises a TAV region. The wall is horizontally-elongated relative to an edge of the TAV region that is in the edge-of-plane region. Other memory arrays and methods are disclosed.
Information query
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